Digital Electronics & Computer Architecture

31h 45m 30s
English
Paid

Embark on a Journey into the World of Digital Electronics: This course offers an inviting introduction to the realm of digital electronics, tailored for beginners. You will learn how the fundamental building blocks of digital systems work, and progressively assemble a basic computer featuring registers, a common bus, an ALU, memory, and an instruction set.

Course Overview

You can view this course as your "first step" into electronics and computer architecture. We begin with the foundational physics at the atomic level and steadily advance to explore popular analog components, such as relays, vacuum tubes, transistors, and logic gates. You'll also delve into memory devices, arithmetic circuits, control logic, and a variety of other pertinent topics. Our approach ensures learning is hands-on, with practical assignments and real circuits crafted throughout the duration of the course.

Learning Outcomes

Upon completion, you'll possess a comprehensive understanding of how a simple computer operates—from electron-level processes within the hardware to the architecture of a computing machine that stores, loads, and processes data.

Required Tools

Our coursework relies solely on free, cross-platform software including EveryCircuit, Falstad Circuit Simulator, Autodesk TinkerCad, and Logisim Evolution. While breadboards are used for assembling small circuits, they are not essential for successfully completing the course.

Who Should Enroll?

No prior knowledge is required to join this course. If you've ever been curious about the basic structure of a computer "under the hood," this course provides the perfect opportunity.

Specifically designed with beginners in mind, this course is ideal for programmers who wish to gain a deeper understanding of the internal workings of the computing machines they interact with daily.

About the Author: Gustavo Pezzi

Gustavo Pezzi thumbnail
Gustavo Pezzi is a university lecturer in London, UK. He has won multiple education awards as a teacher and is also the founder of pikuma.com. Gustavo teaches fundamentals of computer science and mathematics; his academic path includes institutions such as Pittsburg State University, City University of London, and University of Oxford.

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#1: 1. Motivations & Learning Outcomes
All Course Lessons (202)
#Lesson TitleDurationAccess
1
1. Motivations & Learning Outcomes Demo
11:05
2
2. How to Take this Course
02:59
3
3. Electrical Fluid
12:51
4
4. Transmitting Electrical Fluid
13:39
5
5. Reviewing the Atomic Model
15:44
6
6. Conductors & Insulators
07:35
7
7. Electron Spin
14:54
8
8. Electron Flow & Hole Flow
12:45
9
9. Conventional Current & Resistance
11:45
10
10. Measuring Voltage with a Multimeter
11:33
11
11. Limiting Current using Resistors
13:25
12
12. Breadboard Internal Connections
06:23
13
13. LED & Resistor on a Breadboard
08:48
14
14. Autodesk TinkerCad
03:12
15
15. Simulating Simple Circuits
15:37
16
16. Path Lower Resistance
07:15
17
17. Some Notes on Circuit Analysis
13:46
18
18. Units of Measurement
16:39
19
19. The Speed of Electricity
08:54
20
20. Prefixes & Conversions
10:36
21
21. Electric Field
14:39
22
22. Telephone Networks & Switchboards
09:21
23
23. Electricity & Magnetism
08:17
24
24. Interactive Visualizations on Magnetism
06:56
25
25. Relays
09:51
26
26. AC vs DC
13:10
27
27. Inductors & Transformers
14:15
28
28. Capacitors
16:15
29
29. Capacitors & Supply Interruptions
09:04
30
30. LED & Capacitor on a Breadboard
01:52
31
31. Diodes & Polarity Protection
02:47
32
32. Rectifiers & Smoothing Capacitor
03:48
33
33. Relays & Boolean Logic
16:43
34
34. Analog vs Digital Electronics
11:31
35
35. Logic Gates (AND, OR, & NOT)
16:06
36
36. Relay Gates (AND, OR, & NOT)
10:41
37
37. Thermionic Emission
08:58
38
38. Vacuum Tube Diode
08:16
39
39. Vacuum Tube Triode
08:16
40
40. Analog Signal Amplification
16:19
41
41. Semiconductors & Doping
11:10
42
42. N-Type & P-Type Semiconductors
06:03
43
43. PN Junction
11:58
44
44. Transistors
08:28
45
45. NPN Transistor
13:40
46
46. Transistors & Amplification
10:22
47
47. BJT 2N2222 on a Breadboard
15:18
48
48. Logic Gates & BJT Transistors
05:59
49
49. AND Gate using Transistors
15:18
50
50. OR Gate using Transistors
08:13
51
51. NOT Gate using Transistors
08:33
52
52. NAND Gate using Transistors
08:43
53
53. Are NAND Gates Easier to Build
09:38
54
54. XOR Gate using Transistors
07:47
55
55. SR Latch
10:29
56
56. SR Latch using NOR Gates
13:06
57
57. Active High & Active Low
03:29
58
58. SR Latch using NAND Gates
06:48
59
59. Gated SR Latch
07:47
60
60. Gated D Latch
10:20
61
61. Clocked D Latch
15:39
62
62. Preset & Clear Inputs
03:49
63
63. Crystal Clock
20:47
64
64. Master-Slave D Flip-Flop
15:38
65
65. JK Flip-Flop
11:46
66
66. T Flip-Flop
02:23
67
67. Binary Counter (Exercise)
08:21
68
68. Implementing a Binary Counter
11:42
69
69. Registers
07:05
70
70. CD4014 IC Chip
06:35
71
71. Hierarchies & Subcircuits
10:21
72
72. Write Enable
12:27
73
73. Half Adder
12:00
74
74. Sum of Products
18:55
75
75. SoP Simplifications
03:38
76
76. Full Adder
05:42
77
77. 8-Bit Adder (Exercise)
04:16
78
78. Adding Two Bytes
04:01
79
79. 7-Segment Display Driver
19:45
80
80. Double Dabble Algorithm
13:33
81
81. Why Doubling & Why Dabbling
09:04
82
82. Designing a Dabble Chip
07:10
83
83. Designing a Double Dabble Circuit
22:47
84
84. Implementing NOT using NANDs
08:04
85
85. Implementing AND using NANDs
05:08
86
86. Implementing OR using NANDs
05:55
87
87. Implementing XOR using NANDs
19:45
88
88. Completing our 8-Bit Adder
11:03
89
89. Two's Complement
15:31
90
90. Converting Positive to Negative
06:03
91
91. Subtracting Two 8-Bit Numbers
12:41
92
92. The Bus
07:50
93
93. Tri-State Logic
11:15
94
94. Controlled Buffer in Logisim
13:57
95
95. Connecting ALU to Bus
04:56
96
96. Diode Matrix ROM
12:37
97
97. Binary-to-Decimal Decoder
10:51
98
98. Fixing a Small Decoder Mistake
01:28
99
99. Memory Cells using Latches
05:34
100
100. Reading a Word from Memory
09:49
101
101. Read Enable Input
05:34
102
102. Types of ROM
07:38
103
103. Combinational Circuits vs ROM
05:39
104
104. Writing to Memory Addresses
10:40
105
105. Implementing 16 Bytes of RAM
06:56
106
106. Addressing Rows & Columns
05:46
107
107. 74LS219 & 74F189 RAM ICs
07:24
108
108. SRAM vs DRAM
14:26
109
109. Custom RAM Circuit Appearance
14:55
110
110. Connecting MAR & RAM to Bus
09:07
111
111. Connecting Registers & ALU to Bus
09:34
112
112. Exercise Manually Storing RAM Values
03:54
113
113. Manually Storing RAM Values
07:37
114
114. Von Neumann Architecture
04:25
115
115. Program Instructions
14:59
116
116. Output Register
04:26
117
117. Instruction Register & Program Counter
10:02
118
118. Fetch-Execute LDA Instruction
10:20
119
119. Fetch-Execute ADD Instruction
07:29
120
120. Fetch-Execute OUT Instruction
02:23
121
121. Programming Instructions in RAM
05:43
122
122. Manually Executing Micro-Instructions
10:34
123
123. Malvino's SAP-1 Computer
06:01
124
124. Control Unit Sequencer
09:05
125
125. Ring Counter
11:09
126
126. Instruction Decoder
06:13
127
127. Control Unit Inputs & Outputs
14:18
128
128. Changing PC Appearance
11:57
129
129. CU Logic for the Fetch Cycle
05:27
130
130. CU Logic for the LDA Instruction
14:53
131
131. CU Logic for ADD & OUT Instructions
06:30
132
132. Halting the Control Unit
07:51
133
133. Resetting the CPU
03:25
134
134. Adding More CPU Instructions
13:06
135
135. Microinstructions for SUB, STA, & JMP
13:08
136
136. Programming the Loop Program
13:07
137
137. Running our First Loop Program
06:58
138
138. Computers & Computability
11:43
139
139. Turing Completeness
13:28
140
140. 16-Bit Long Instructions
13:03
141
141. Instruction Register Hi & Lo Bytes
16:38
142
142. Implementing 256 Bytes of RAM
13:07
143
143. Changing our RAM Circuit Design
04:59
144
144. Increasing Ring Counter Steps
06:02
145
145. Storing CU Logic in ROM
14:43
146
146. Encoding TSteps in Binary
06:51
147
147. Testing our ROM Addresses
03:28
148
148. Logisim's ROM Text File Format
04:32
149
149. A Spreadsheet of CU ROM Values
07:06
150
150. A Python Script to Export ROM
05:57
151
151. Connecting All CU Signals
08:15
152
152. Visualizing TSteps using LEDs
08:16
153
153. Hardwiring CU Signals for T0 & T1
06:50
154
154. Loading Instructions using Hex
05:05
155
155. Running our Code with the CU ROM
06:17
156
156. Removing T0 and T1 from ROM
09:41
157
157. Exercise Adding Steps T8 and T9
05:10
158
158. Adding Steps T8 and T9
07:14
159
159. ALU Operation Selection
07:44
160
160. New ALU & Branch Instructions
14:56
161
161. Our New ALU Logisim Component
12:36
162
162. Exercise Bitwise AND
04:36
163
163. Bitwise AND & ALU Op Decoder
08:48
164
164. Bitwise OR, XOR, & NOT
05:24
165
165. Shifting Bits Right & Left
07:29
166
166. Zero, Negative, & Carry Flags
08:16
167
167. ALU Ops Microinstructions
13:16
168
168. Including ALU Ops in our CU ROM
09:05
169
169. Processor Status Flags Register
10:33
170
170. Using Flags in our CU Logic
07:56
171
171. Jump Condition Ops
13:36
172
172. Decoding Condition Ops
05:29
173
173. Matching Condition Ops & Flags
11:53
174
174. Adding BRK to ALU Ops
03:03
175
175. Exercise Even & Odd Numbers
07:28
176
176. Code to Test Even & Odd Numbers
06:54
177
177. Step by Step Even & Odd Code
07:49
178
178. Exercise Countdown Loop
01:29
179
179. Countdown Loop Assembly Code
10:04
180
180. Exercise Fibonacci Sequence
04:50
181
181. Fibonacci Sequence in Python
05:06
182
182. Fibonacci Sequence Assembly Code
08:38
183
183. Writing a Simple Assembler
08:46
184
184. Reading Command Line Args
09:01
185
185. Collecting All Labels
06:36
186
186. Generating Machine Code
11:58
187
187. Assembling our Fibonacci Code
05:27
188
188. ADD & SUB Immediate
03:28
189
189. Countdown Loop using SUB Immediate
03:10
190
190. Absolute vs Relative Jumps
04:03
191
191. Working with Multiple Registers
13:28
192
192. Benefits of Multiple Registers
07:48
193
193. Register File
13:19
194
194. RISC vs CISC
13:08
195
195. Instruction Pipeline
09:46
196
196. Digital Logic Circuit Technologies
08:44
197
197. MOSFETs
14:31
198
198. N-Channel MOSFET
12:03
199
199. P-Channel MOSFET
03:29
200
200. Enhancement vs Depletion Mode
06:03
201
201. CMOS
06:53
202
202. Conclusion & Next Steps
16:17
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